There exists at the present time different types of substrates for the production of radiofrequency (RF) devices.
A first type of substrate encompasses substrates comprising a layer of silicon on insulator substrate, such as, for example, silicon-on-quartz (SOQ), silicon-on-sapphire (SOS), or silicon-on-glass (SOG) substrates.
These substrates procure excellent radiofrequency performances but have very poor characteristics regarding logic devices, on account of the poorer quality of silicon. They are moreover very costly.
A second type of substrate is a high resistivity (HR) bulk silicon substrate.
“High resistivity” is typically taken to mean an electrical resistivity above 500 Ohm·cm.
These substrates have poorer performances than the first, and logic devices do not benefit from the advantages of SOI-type structures, but they have the interest of being inexpensive.
A third type of substrate is a substrate known as HR-SOI (High Resistivity Silicon on Insulator), in other words, constituted of a layer of silicon on a high resistivity silicon substrate, a thick layer of oxide being buried at the interface. This layer of oxide is thus generally designated by the term BOX (“Buried OXide”).
Such substrates are particularly advantageous for the operation of logic devices, but exhibit poorer radiofrequency performances than SOQ or SOS substrates.
Indeed, these substrates have the drawback of sometimes including a layer of low resistivity under the oxide layer.
“Low resistivity,” is taken to mean in the present text a resistivity below 500 Ohm·cm.
The presence of this low resistivity layer may be due to contamination of the surface of the substrates (for example, by a condensation of boron and/or phosphorous) before bonding. These contaminants are then encapsulated at the bonding interface, and are capable of diffusing into the high resistivity substrate.
Another cause of the formation of the low resistivity layer arises when the starting substrate is a silicon substrate with a high density of interstitial oxygen atoms: it is then necessary to carry out a heat treatment to make the oxygen precipitate and obtain the requisite high resistivity. However, it happens that atoms of oxygen diffuse into the substrate before or during this treatment, which leads to the formation in the substrate of regions with a low level of precipitation—thus a low resistivity—particularly in the vicinity of the surface of the substrate.
These two causes are presently difficult to control.
A fourth type of substrate consists in an HR-SOI-type substrate in which the HR substrate is improved by the addition of traps.
Different techniques have been developed in this aim, but they have the drawback of being very sensitive to the heat treatments implemented to manufacture the SOI than the devices on the latter.
For instance, it is known to deposit a layer of poly-crystalline silicon between the layer of oxide (BOX) and the HR substrate.
The reader may refer in this respect to the following publications: D. Lederer, R. Lobet and J.-P. Raskin, “Enhanced high resistivity SOI wafers for RF applications,” IEEE Intl. SOI Conf., pp. 46-47, 2004; D. Lederer and J.-P. Raskin, “New substrate passivation method dedicated to high resistivity SOI wafer fabrication with increased substrate resistivity,” IEEE Electron Device Letters, vol. 26, no. 11, pp. 805-807, 2005; D. Lederer and J.-P. Raskin, “RF performance of a commercial SOI technology transferred onto a passivated HR silicon substrate,” IEEE Transactions on Electron Devices, vol. 55, no. 7, pp. 1664-1671, 2008; and D. C. Kerr et al., “Identification of RF harmonic distortion on Si substrates and its reduction using a trap-rich layer,” 978-1-4244-1856-5/08, IEEE 2008.
Poly-crystalline silicon recrystallizes at high temperature, however, and the dopants present at the interface between the layer of poly-crystalline silicon and the HR silicon substrate diffuse into the latter, which has the effect of reducing the resistivity thereof.
PCT application WO 2010/002515 proposes for its part an alternative to the use of an HR silicon base substrate in the aforementioned HR-SOI substrates, by replacing the bulk base substrate by a structure comprising a thick semi-conductor layer with high resistivity on a support of standard resistivity.
To avoid dopants or contaminants present in the support risking diffusing into this highly resistive semi-conductor layer and thereby reducing its resistivity, it is recommended to place, between the support and the semi-conductor layer, a diffusion barrier. Such a diffusion barrier may consist of one or more layers of silicon oxide and/or silicon nitride and have a thickness of at least 20 nm.
Furthermore, by virtue of its high thickness (of the order of 50 to 100 μm), this resistive layer is comparable to a substrate.
Substrates for radiofrequency devices are subject to the fact that at high frequency, the electric field penetrates into the substrate and affects any charge carriers that it encounters, with as consequences, on the one hand, a needless consumption of energy (this effect is known as “transmission loss,” or “insertion loss”); on the other hand, an influence on other devices, the behavior of which will be modified through the substrate (effect designated as “crosstalk”).
In addition, the rise and descent of the signal induces a variation in the capacitance of the substrate, which leads to the generation of waves at harmonic frequencies of the main frequency. These harmonic waves and their combinations may constitute parasite signals particularly bothersome for radiofrequency applications. The use of a poly-crystalline silicon layer blocks the potential under the BOX, thereby limiting the capacitance variations and thus reducing the power of the harmonic waves generated.
Finally, the optional presence of charges in the BOX, as well as the use of direct voltages by certain devices, may lead to the creation of an accumulation or inversion layer (thus very conductive) under the BOX. The poly-crystalline silicon layer, blocking the potential under the BOX, eliminates this negative effect.
Thus, the present invention seeks to overcome the deficiencies of the art.